{"id":13999,"date":"2016-04-28T21:46:00","date_gmt":"2016-04-28T12:46:00","guid":{"rendered":"https:\/\/www.jedat.co.jp\/?p=13999"},"modified":"2022-05-01T17:42:25","modified_gmt":"2022-05-01T08:42:25","slug":"20160428","status":"publish","type":"post","link":"https:\/\/www.jedat.co.jp\/en\/events-en\/20160428\/","title":{"rendered":"Jedat exhibits at DAC 2016, to be held at Austin, TX. We look forward to meeting you at the show !"},"content":{"rendered":"\n
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Jedat exhibits at DAC 2016, to be held at Austin, TX.
We look forward to meeting you at the show !<\/span><\/strong><\/h2>\n\n\n\n

2016.4.28<\/p>\n\n\n\n

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\"Photomask<\/a><\/figure><\/div>\n\n\n\n
Exhibition name<\/td>Design Automation Conference (DAC) 2016<\/a><\/td><\/tr>
Exhibit Hours<\/td>Monday, June 6\u3000\u3000\u3000 \u300010:00am – 6:00pm
Tuesday, June 7\u3000\u3000\u3000\u300010:00am – 6:00pm
Wednesday, June 8\u3000\u300010:00am – 6:00pm<\/td><\/tr>
Exhibition Site<\/td>Austin Convention Center<\/a>\u3000(Austin, Texas)<\/td><\/tr>
Booth No.<\/td>428<\/td><\/tr>
DESIGNER TRACK<\/td>\u201cPLL design using automatic analog migration tool\u201d<\/strong>
Session Title: Design \/ IP Track Poster Session
Date : Tuesday, June 7
Time : 5:00pm – 6:00pm
Location : Exhibit Floor<\/td><\/tr>
Request of demonstration<\/td>By email : Please click here<\/a><\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

\"SX-Meister\"SX-Meister RVT – CircuitSynthesis<\/strong><\/h2>\n\n\n\n

Automatic reuse-based analog synthesis tools<\/h4>\n\n\n\n
\"RVT<\/figure><\/div>\n\n\n\n

” Reduce design porting time to 1\/10!! “<\/h3>\n\n\n\n