{"id":13971,"date":"2018-05-22T21:22:00","date_gmt":"2018-05-22T12:22:00","guid":{"rendered":"https:\/\/www.jedat.co.jp\/?p=13971"},"modified":"2022-05-01T17:37:10","modified_gmt":"2022-05-01T08:37:10","slug":"20180522","status":"publish","type":"post","link":"https:\/\/www.jedat.co.jp\/en\/events-en\/20180522\/","title":{"rendered":"Welcome to Jedat at DAC2018"},"content":{"rendered":"\n
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\"\" Jedat Inc.<\/strong><\/h3>\n<\/div>\n\n\n\n
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HOME ><\/span> <\/a><\/p>\n<\/div>\n\n\n\n

Events<\/a><\/div><\/div>\n\n\n\n
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><\/span><\/p>\n<\/div>\n\n\n\n

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Welcome to Jedat at DAC2018<\/strong><\/h2>\n\n\n\n

2018.5.22<\/p>\n\n\n\n

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\"DAC<\/a><\/figure><\/div>\n\n\n\n
Exhibition name<\/td>Design Automation Conference\u300055th<\/sup><\/a><\/td><\/tr>
Exhibit Hours<\/td>Monday, June 25 \u2013 10am to 6pm
Tuesday, June 26 \u2013 10am to 6pm
Wednesday, June 27 \u2013 10am to 6pm<\/td><\/tr>
Exhibition Site<\/td>Moscone center, San Francisco, CA<\/a><\/td><\/tr>
Booth No.<\/td>2339<\/td><\/tr>
Design \/ IP Track Session<\/td>\u201c Practical cell based analog design methodology (AnaCell) \u201d<\/strong>

Session Title: The APIs for Design Implementation
WEDNESDAY June 27, 3:30pm – 5:00pm
Room 2010<\/td><\/tr>
Demo reservation<\/td>Please let the following demo reservation : Please click here<\/a><\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

\uff11. SX-Meister<\/span><\/strong><\/h4>\n\n\n\n

Custom LSI design tool which enables the inheritance of design intent and know-how of experience<\/p>\n\n\n\n

\uff12. SX-Meister\/Asca-Advanced<\/span><\/strong><\/h4>\n\n\n\n

Circuit design platform includes the new methodology of analog cell level design which improve productivity and reusable and standardization of Analog design.<\/p>\n\n\n\n

\uff13. SX-Meister\/GT-Router<\/span><\/strong><\/h4>\n\n\n\n

Constraint-Driven router to automatically generate critical signal and power line<\/p>\n\n\n\n

\"GT-Router\"\/<\/figure><\/div>\n\n\n\n
\"GT-Router\"\/<\/figure><\/div>\n\n\n\n
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