As the scale and speed of ICs increases, layout design environments must become more powerful to process ever larger amounts of data. In addition, as ICs are now used in highly diverse fields and therefore have to process mixed signals, the design environment must be able to cope with a wide variety of design styles.
In response to these demands, Jedat Inc. has developed a new, next-generation IC layout system, Ismo, based on the broad experience and technological know-how acquired with the SX-9000.
With Ismo, designers can implement a design environment that is tailored to their specific needs by integrating the easy-to-use manual design environment, powerful automatic design tools, and a verification environment.

Features

Support of Windows platform

• Windows, Solaris, HP-UX, and Linux platforms are supported.
• Hybrid Windows/UNIX design environment that does not require data conversion

Capable of handling large and complex data (10 million gates or more)

• No limit of the number of cells, layers, etc.
• Increased performance for viewing, editing, data conversion, etc.

Integrated polygon and net-driven editing

• Push-Aside by means of automatic net trace for polygons
• Automatic net assignment at figure input

Reinforced device generation

• Support of parameterized object (ParaO) function
• Graphical object definition and automatic Axel script generation

Improved operability

• Multi-language menus (Japanese and English modes)
• Windows-like WYSIWYG* operability

* What You See Is What You Get

Product configration

Product overview

Ismo

• Polygon input editing
• Net-driven input editing
• Parameterized object (ParaO) placement and deformation
• File import/export
  EDIF input, SPICE input, Verilog input/output, GDS2 input/output, SX input/output, Saif input/output

Device options

• SIRIUS-equivalent object generation Device types (MOS, BJT, DIODE, CAP, R, etc.)
• Device definition load reduced using a definition method

FloorPlan options

• LEF/DEF import/export
• Region and row operation
• Net Builder
• PAD placement

Development Tool Kit

• Axel programming environment (Visual Axel)
• Parameterized object (ParaO) definition environment
• Sail

Overview of Ismo

New database

• Database binary compatible between Windows and UNIX, achieving a hybrid environment which eliminates the need for conversion by using the endian adjustment function.
• New database capable of handling large and complex data (10 million gates)
• Accelerated LEF/DEF conversion
• High-speed response times for both net operation and data editing
• Distributed editing and cell generation management by Check In and Check Out
• Free from data restrictions and improved performance

Parameterized object (ParaO)

• Generation of user-defined device using ParaO
• Graphical definitions of parameters such as those for placement, repetition, and stretching
• Generation of Axel scripts that can be edited from information about graphical definitions
• Graphical debugging using temporary placement
• Inheriting of all SX-9000 S IRIUS device definition and generation functions

Advanced editor provided as standard

• Net-driven editing function supported as standard
• Push-Aside for routing and automatic loop removal
• Rule-driven editing performed through automatic net trace for polygons
• Automatic net assignment and automatic net building according to routing state

Floorplan and chip layout

• Net reconstruction by Net Builder
• Automatic block placement (Block Placer)
• Automatic pin assignment (Global Router)

Axel user customization

• User-defined Axel statements that can be called in all stages from editing to menu setting
• Diverse Axel functions that can be used for database access, device definition, menu operation, verification (DRC and ERC), etc.
• Customized-command generation, ParaO generation, and user tool incorporation

- Free from res trictions and improved performance -

Layout verification and online verification

• Collective and real-time checks that can be made by the same rule
• GUI for rule descriptions
• Logic operation and detail check functions implemented for real-time check
• Advanced DRC, ERC, LVS, and LPE functions
• Import of other vendors' rules (Calibre, Dracula, and Diva)

Collaboration with automatic design tools

• Automatic analog-device placement (Amper)
• Automatic routing (Rexsir)
• Layout compaction (Gravity)
• Automatic block routing (Bplnner)

Schematic entry interface

• Object placement and cross-probing by a schematic editor (Asca) Loading of EDIF (schematic, netlist) and SPICE netlists
• Linking with other vendors' schematic entry tools (CAELINK) CR-5000 (Zuken), Composer (CADENCE), DesignArchtect2 (Mentor), etc.
• Cross-probing, object placement, and layout property (pair, group, etc.) setting

Fine-pattern design (FineArts)

• Perfect pattern editing
  Automatic equivalent-resistance routing
  Faithfully inherited SX-9000 FDP functions
• Schematic and dimension-line input
  Fully supported mechanical CAD functions

Utilizing SX-9000 assets

• Command procedure-to-Axel conversion
• Axel programs usable without modification
  Program execution about 50 times faster
  Expanded and enhanced class/member functions
• Saif support
• SX-9000 data import/export
• Expanded ParaO functions
• Sail support

Data input/output

• Import/export of external standard files
  GDS, LEF/DEF, Verilog, EDIF, SPICE, DXF, IGES, etc.
• GUI-based interactive operation (as well as batch operation)

General editor input operations

• Mouse and tablet
• Input by hand-written symbols
• Pull-down menus, dialog menus, and tool bar
• Command input by keyboard and shortcut key entry

Supported platforms

• Solaris, HP-UX
• Windows, Linux